AMD's 'Venice' to be 1st chip to use TSMC's 2nm node

Taipei, April 15 (CNA) The next-generation AMD EPYC processor, coded "Venice," will be the first high-performance computing (HPC) processor on the market to use Taiwan Semiconductor Manufacturing Co.'s (TSMC) advanced 2 nanometer process, Advanced Micro Devices, Inc. (AMD) said Tuesday.

In a statement, AMD said the new processor had completed the "tape-out process," the final phase of the design process for integrated circuits before they enter production, and that it was on track to launch next year.

Venice is on track to launch next year as AMD and TSMC co-optimized new design architectures with cutting edge process technology through their partnership, AMC said in a statement.

AMD CEO Lisa Su (蘇姿丰) visited TSMC Chairman and CEO C.C. Wei (魏哲家) at the chipmaker's headquarters Monday in Hsinchu, where the Taiwanese company's 2nm process is scheduled to start production in the second half of this year.

According to AMD, the new HPC processor also marks a significant step forward in the execution of the American chip designer's data center CPU roadmap.

In the statement, AMD also highlighted the successful validation of its 5th Gen AMD EPYC central processing unit (CPU) products at TSMC's new wafer fab located in Arizona to underscore its commitment to U.S. manufacturing.

"TSMC has been a key partner for many years and our deep collaboration with their R&D and manufacturing teams has enabled AMD to consistently deliver leadership products that push the limits of high-performance computing," AMD's Su said in the statement.

"Being a lead HPC customer for TSMC's N2 process and for TSMC Arizona Fab 21 are great examples of how we are working closely together to drive innovation and deliver the advanced technologies that will power the future of computing," Su said.

Fab 21, the first TSMC fab in Arizona, began mass production in 2024 using the 4nm process.

In response, TSMC's Wei (魏哲家) said he was proud to have AMD as a lead HPC customer for the chipmaker's advanced 2nm process technology and for its Arizona fab.

"By working together, we are driving significant technology scaling resulting in better performance, power efficiency and yields for high-performance silicon," Wei said.

TSMC is currently building a second fab in Arizona, with commercial production slated for 2028 using the 2nm and 3nm processes. It is seeking to break ground on a third fab in the state as soon as possible with the 2nm or more advanced processes expected to use.