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National research center unveils substrate-less chip-level packaging technique

01/13/2026 07:36 PM
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Minister of the National Science and Technology Council and NIAR Chair Wu Cheng-wen (right) attends a press event of Taiwan’s National Institutes of Applied Research in Taipei on Tuesday. CNA photo Jan. 13, 2026
Minister of the National Science and Technology Council and NIAR Chair Wu Cheng-wen (right) attends a press event of Taiwan’s National Institutes of Applied Research in Taipei on Tuesday. CNA photo Jan. 13, 2026

Taipei, Jan. 13 (CNA) Taiwan's National Institutes of Applied Research (NIAR) has introduced an open R&D platform featuring a chip-level packaging technique that eliminates the use of substrates as part of its effort to bolster the country's advanced packaging ecosystem.

NIAR's Taiwan Semiconductor Research Institute (TSRI) presented the packaging platform at a press event in Taipei on Tuesday, saying that the technique will help shift Taiwan's competitive edge in the chip industry from manufacturing processes to system integration and application innovation.

Wu Cheng-wen (吳誠文), minister of the National Science and Technology Council and NIAR chairperson, said advanced packaging is the key to future AI applications that require chips offering higher performance, higher density, and lower power consumption.

The newly unveiled Chip-on-Chip-on-Board (CoCoB) architecture represents a specialized approach compared to Chip-on-Wafer-on-Substrate (CoWoS) -- one of the most advanced packaging technologies currently employed by Taiwan Semiconductor Manufacturing Co. (TSMC) -- TSRI Deputy Director General Juang Ying-zong (莊英宗) said.

While CoWoS achieves high-density integration of computing chips and high bandwidth memory (HBM) using interposer wafers and substrates, the substrate layer presents challenges in terms of cost, signal transmission distance, and process complexity, Juang explained.

In the CoCoB architecture, the interposer chip is directly connected to the circuit board, effectively enhancing integration density and system performance by significantly shortening signal transmission paths, he said.

Juang likened the technical challenge to "placing a large sheet of tempered glass onto a pebble-covered ground while ensuring every single contact point is precisely connected." The TSRI overcame this by implementing a flowable interface material beneath each micro-solder ball to ensure that all connection points are reliably bonded.

By eliminating substrate costs and reducing process complexity, CoCoB is particularly well-suited for academic institutions and startups to conduct high-flexibility, low-cost heterogeneous integration experiments, TSRI said.

To date, the project has attracted participation from 16 professor-led research teams from Taiwan and abroad, according to Juang.

(By Chao Yen-hsiang)

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