TSMC, ASML partner on 12-inch EUV photomasks for advanced chips

Taipei, Sept. 8 (CNA) Taiwan Semiconductor Manufacturing Co. (TSMC) announced Tuesday that it will collaborate with Dutch semiconductor equipment maker ASML Holding N.V. to lead the semiconductor industry's transition to larger 12-inch extreme ultraviolet (EUV) lithography photomasks for advanced chip production.

The partnership, announced ahead of the SPIE Photomask Technology + Extreme Ultraviolet Lithography conference, aims to establish a pilot production line for 12-inch EUV photomasks by 2031 and prepare the lithography ecosystem for volume manufacturing by 2033, TSMC said in a statement.

According to TSMC, the world's largest contract chipmaker, the shift from current 6-inch EUV photomasks to 12-inch versions is expected to improve wafer fab productivity, reduce chip manufacturing costs and eliminate the need to stitch together two 6-inch photomasks during high numerical aperture (High NA) EUV exposure.

EUV is an advanced lithography technology used to manufacture semiconductor chips, while photomasks are templates used to transfer circuit patterns onto silicon wafers.

The transition will allow advanced chipmakers to fully capitalize on the advantages of High NA EUV technology while improving the cost efficiency of future generations of advanced chips, TSMC said.

TSMC Chairman and CEO C.C. Wei (魏哲家) said the company plans to introduce ASML's High NA technology into mass production for advanced processes beginning in 2030.

As semiconductor technologies advance, particularly as artificial intelligence applications drive increasingly complex transistor architectures, TSMC expects the number of photomask layers requiring High NA EUV exposure to grow, Wei said.

ASML President and CEO Christophe Fouquet said that the adoption of High NA EUV is expected to increase as the industry continues to push the limits of device miniaturization.

Chipmakers will initially continue using existing 6-inch photomasks before transitioning to 12-inch versions to further improve equipment productivity and meet growing demand for smaller, faster and more energy-efficient chips, Fouquet said.