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ASE working with AMD on improve data center efficiency

06/09/2025 05:56 PM
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Taiwan-based ASE Technology Holding Co. CNA file photo
Taiwan-based ASE Technology Holding Co. CNA file photo

Taipei, June 9 (CNA) Taiwan-based ASE Technology Holding Co., the world's largest outsourced semiconductor assembly and test (OSAT) company, is partnering with artificial intelligence chip designer Advanced Micro Devices, Inc. (AMD) to improve the efficiency of data center use.

According to the AMD blog, ASE initially decided to use AMD's EPYC and Ryzen processors in its data center systems, which are needed "to handle a big volume of data analysis," Jekyll Chen (陳裕忠), director of ASE's IT Infrastructure division, was cited as saying.

The move paid dividends for ASE as the processors help deliver "a simultaneous 50 percent improvement in performance and a 6.5 percent cut in power consumption when compared to non-AMD systems it had used before," the blog said.

"We work for many semiconductor companies. Our challenges are the need for high performance, low latency, and high core count, in alignment with ASE's ESG policy. Stability and scalability are two primary goals for us," Chen was quoted as saying in the blog.

Following the success of the EPYC and Ryzen processors, ASE has started studying the possibility of introducing data center accelerators like AMD's Instinct MI300 Series graphics processing unit (GPU), as AI workloads have become more important, the AMD blog said.

For years, AMD has worked with contract chipmaker Taiwan Semiconductor Manufacturing Co. (TSMC) in its development of next-generation GPUs.

In April, the American chip designer announced the next-generation EPYC processor, coded "Venice," will be the first high-performance computing (HPC) processor on the market to use TSMC's advanced 2 nanometer process.

In addition, AMD also highlighted the successful validation of its 5th Gen AMD EPYC central processing unit (CPU) products at TSMC's first wafer fab located in Arizona, which began mass production in 2024 using the 4nm process.

(By Chung Jung-feng and Frances Huang)

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